1. Field of the Invention
The present invention relates to semiconductor integrated circuits and, in particular, to ferroelectric circuits utilizable for programming configurable logic.
2. Discussion of the Prior Art
Configurable logic consists of a rectangular array of individually-programmable functional logic cells, each of which is connected to its neighbors by a programmable link. An open link means no connection; a closed link establishes a connection between cells. Thus, the configuration of the individual cells and of the links in the array determines the logic function to be performed by the circuit.
In some configurable logic arrays, such as PALs or PLAs, the links can only be programmed once. Thus, the system is permanently configured after programming. In other configurable logic arrays, such as that disclosed by Freeman, U.S. Pat. No. 4,870,302, the circuitry which stores the configuration data for the cell array is volatile, and the array needs to be reconfigured each time the chip is turned on.
In still other configurable logic array architectures, such as EEPROMs, configuring the array requires applying a high voltage which is distinct from the normal, operating supply voltage for a prolonged period of time in order to reconfigure the chip.
Additional examples of programmable logic devices and techniques are described in the following documents Furtek, U.S. Pat. No. 5,019,736, "Programmable Logic Cell and Array"; Furtek, U.S. Pat. No. 4,700,187, "Programmable Asynchronous Logic Cell and Array"; El Gamal, U.S. Pat. No. 4,873,459, "Programmable Interconnect Architecture"; Furtek, U.S. Pat. No. 4,918,440, "Programmable Logic Cell and Array"; and Austin, U.S. Pat. No. 4,935,734, "Semi-Conductor Integrated Circuits/Systems".
Due to recent developments in semiconductor technology, ferroelectric elements have become popular choices for implementing data storage devices. Ferroelectric devices rely on the polarization of domains in a PZT thin film structure to store information. Because polarization is maintained after the power is removed, while stored charge is not, and because they require little power and are quite compact, ferroelectric devices provide an excellent means for implementing a low power, nonvolatile memory circuit.
Ferroelectric storage circuits typically include one or more ferroelectric capacitors and various transistors utilized for appropriately charging and discharging the capacitors. A ferroelectric capacitor can be thought of as possessing a polarization which, as an approximation, arises from how it was last charged to its maximum value. In particular, assuming the capacitor consists of two plates N and S, one polarization occurs when the capacitor is charged to its maximum value with plate N at a higher voltage than plate S, and the other polarization occurs when the maximum charging occurs with plate S at a higher voltage than plate N. This polarization is maintained even if the voltage across the capacitor changes, provided that the voltage across the capacitor does not swing toward the maximum value in the opposite direction. In particular, the polarization is maintained even after power is removed from the device.
Because ferroelectric capacitors are compact and can be designed to have maximum voltages near the regular power supply voltage, they are good components for use in building non-volatile storage elements. The polarization of a ferroelectric capacitor can be detected electrically because the capacitance in one polarization state differs substantially from the capacitance in the other polarization state.
For simplicity in the discussion that follows, one of the polarization states is called "up" and the other polarization state is called "down"; it is assumed that the capacitance of the "up" polarization state is greater than that of the "down" polarization state.
A common method of using ferroelectric capacitors for building a memory element is disclosed in Eaton, Jr., U.S. Pat. No. 4,918,654 for "SRAM with Programmable Capacitance Divider". Eaton's memory element uses two ferroelectric capacitors. A "1" is stored by forcing the polarization of one capacitor into the "up" mode and the polarization of the other capacitor into the "down" mode. A "0" is stored by configuring the polarizations of the two capacitors in exactly the opposite manner. The stored value is read by charging each of the capacitors and comparing the resulting voltage. Because the polarizations differ, the capacitances differ, thus causing the voltages at each of the intermediate nodes to differ. In essence, the sign of this capacitance difference determines the stored value.
Other relevant examples of ferroelectric storage circuits include Dimmler, U.S. Pat. No. 4,809,225 for "Memory Cell with Volatile and Non-Volatile Portions Having Ferroelectric Capacitors" and Eaton, Jr., U.S. Pat. No. 4,914,627 for "One Transistor Memory Cell with Programmable Capacitance Divider".
In addition, Miller, U.S. Pat. No. 4,974,204 for "Non-Volatile Programmable Interconnection Circuit" discloses a programmable interconnection circuit that utilizes two ferroelectric capacitors that differentially store the programming state of the circuit. Although the Miller circuit provides a programming circuit having the advantages of ferroelectric data storage, it does not provide the cell isolation and capacitor equalization required for stable data retention.